New Techniques for Hardware Implementations of SHA

Authors

  • Dr. V.C.Madhavi

  • Dr. Ch.Ravi Kumar

  • G.RamaKrishna Prasad

Keywords:

Secure Hash Algorithm (SHA), cryptography, hash functions, hardware implementation, FPGA, software implementation

Abstract

Secure Hash Algorithms are one of the forms of cryptographic algorithms. SHA hash functions are widely used security constructs. However, they are software implementations of SHA. This paper proposes techniques for hardware implementation of SHA. In order to provide security and improve performance, these methods are used in hardware reutilization and operation rescheduling. The purpose of implementing SHA at hardware level is to improve throughput. The empirical results revealed that the throughput is increased by 29 to 59% in case of SHA-1 implementation. The throughput is further increased up to 100% when SHA-2 is implemented and used. Thus it is evident that hardwahre implementation of SHA has more speed when compared with software implementations of SHA.

How to Cite

New Techniques for Hardware Implementations of SHA. (2012). Global Journals of Research in Engineering, 12(F7), 35-38. https://testing.engineeringresearch.org/index.php/GJRE/article/view/100209

New Techniques for Hardware Implementations of SHA

Published

2012-03-15

How to Cite

New Techniques for Hardware Implementations of SHA. (2012). Global Journals of Research in Engineering, 12(F7), 35-38. https://testing.engineeringresearch.org/index.php/GJRE/article/view/100209